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bob1200xl

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About bob1200xl

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    River Patroller

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    Placerville, CA 95667

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  1. What is a reasonable price? Modifying a 400 costs time and money, and you still don't have an 800. Bob
  2. Why not buy one from Best? If you can't find a SIO connector at all, I have a couple of extras. Bob
  3. You could try freezer spray - sparingly and localized to just a few suspects. Do you see screen corruption before the crash, or is it simultaneous? Bob
  4. How does it normally fail? Do you normally see wild characters in your screen data? That should not crash the system, but it is an indication that memory access is flakey. Bob
  5. Some messages do not word wrap people's entries. Can I fix this? Thanks. Bob
  6. Yes, it does seem to wander about the disk as it loads. A stock 1050 works OK. I may have drive problems with my 810s, which isn't helpful at all. It looks like the 810 can crash a disk even if it is write-protected. Not oxide damage or anything like that, just stepping on the track data. Thanks for the help, guys. Bob
  7. I am trying to boot an original Flip and Flop (First Star) disk, but it will not complete. It reads a couple of sectors, seeks someplace else and reads some more... never gets to an opening screen. It does load a background graphic after a few reads. I thought maybe it didn't like the XF551 so I tried a Happy 1050... no. Tried an 810... no. Tried an 800... no. You can tell when a drive gets a read error. Not doing that. The diskette surface is very clean and unblemished. Does anyone have F&F? Is there a trick to it? Bob
  8. I clean up the video signal and use s-video. If you just use the signal the way Atari made it, yes, it won't look much different - either is poor. You can try s-video by using the composite signal for CHROMA. They didn't wire CHROMA to the video connector on the 1200XL. I don't do much gaming on my Atari but even if I do boot up LodeRunner, it looks OK. Bob
  9. bob1200xl

    bob1200xl

  10. Capacitors, especially electrolytics, are complex components. They have many characteristics besides capacitance, particularly at high frequency. You will often see an electrolytic shunted by a ceramic, just for this reason. Things go wrong inside and you may filter OK at 60hz, but fall down flat at 1.79mhz. Bad electrolyte, high inductance, phase of the moon - who knows what may be happening. The higher voltage rating may help with your noise because of improved geometry. Worth a try... This is what we are doing here, right? Bunch of folks try this and it works, we learned something. If it doesn't work most of the time, we learned something. Our brains will just be jammed with smarts! Bob
  11. The 65816 can output an 8-bit address as bits A16 - A23 on the data buss during the first half of the cycle. You latch those bits and use them to drive from 64K to 16mb. On the XL14 and XL7, this gives you a 512K memory space of random access memory. Your RAM uses some sort of register to select banks, no? RAMBO style? Well, maybe a little bit... what's wrong with banker boxes? Bob
  12. The XL7 re-wires the clock circuit to use a 14.32 oscillator on the new PCB. I might have isolated A15, also. The XL14 uses the Atari oscillator and a PLL on the new board. No wiring needed. A15 is how I control ANTIC selection since ANTIC does not have a -CS pin. You can use your SRAM if it is fast enough (<70ns), but I have no way to select linear memory above $FFFF with the 65816. Looking at the XL14, you could map a PDIP into the space used by the two SRAMs. Run it like an XL7 but with drop-in convenience. If you could get inexpensive boards made for this, what? $40 or less for the whole thing? Bob
  13. The XL7 has two small CPLDs, SRAM memory, and a 65816 that replaces the 6502C. It needs wiring changes on the system. Runs at 7.16 or 1.79mhz. This is an XL14. It has one large CPLD, SRAM memory, a 65816 that replaces the 6502C, and 512K of battery-backed SRAM. No wiring is required - it just drops into a socketed XL. You don't need the Battery-backed SRAM. Runs at 14.32, 7.16, or 1.79mhz. I'm looking for the docs... Bob
  14. I have not found my 7/14mhz stuff yet... Basically, your cycle starts with PH02 going low. One of the chips will drive an address onto the buss, either ANTIC (HALT is active) or CPU (HALT is inactive). If the CPU is accessing SRAM, you pull PH02 high at the first clock (70ns at 7mhz) and them back to low after another 70ns. Anything else has to be aligned with the 1.79 master clock at fall of PH02 and changes state at 280ns. You can see that going to SRAM and then to anything else will take two full cycles - you only get to go fast when SRAM is accessed consecutively. If I find my stuff, I'll post it here. I don't think there is a schematic. There is no logic, just a 22V10 or some such. Bunch of wires go in, bunch of electricity comes out. Bob
  15. Yes, you are correct. The 7mhz machine gets 1899 primes in 3.700 seconds. The hardware is very similar except for the memory wrap around $10000. The 14 wraps to $10000 as it should, while the 7 does not. Both have 65816s. If I run the OS in ROM, I get 1899 and a tiny bit slower at 14mhz. Like this:
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