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Ksarul last won the day on May 5 2017

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  1. Vitamin D is definitely a good thing here. . .the body seems to consume a lot of it when you have COVID, and if you are low to start with, it definitely impacts the body's ability to fight it off.
  2. The main issue with the disks is that they put the catalog track somewhere completely different. Plato expects to be able to read that odd catalog track to pull up the software. It also expects all of the standard low-level access routines of the disk controller DSR to be present when reading disks.
  3. Yep, I've been using this to test the last few batches of SAMS cards I've built. It works like a charm--and will even detect and test one of my 4M cards. . .
  4. The LOGO Manual is up on the Hexbus site as a scan that Ernie did a number of years back. He scanned the commercial version of the book, but the contents are identical to the TI manuall, IIRC. Only the covers and a few lead-in pages are different.
  5. Not to forget that Ron Walters found an error in the Gate Array when designing his memory expansion for the Geneve. That was one reason anything larger than a 512K expansion needed the modification in the Gate Array area. This problem may have been part of the reason that Myarc never released their own large memory card for it. Genmod also allows for a huge chunk of zero-wait-state memory (switch selected so that it wouldn't interfere with programs expecting slower memory).
  6. Actually, the Pre-School label stayed with it for the British release. I have one with the Pre-School Early Learning Fun title screen (it has a paper label though, so it may have actually been a qual unit). I'll have to dig it out and look at the GROMs to see if they are the version without the "A" at the end. The letter on the TMC 1985 also explains why C. B. Wilson had one of them too--he was the hardware manager at that point in time, per the signature block.
  7. Rich, there is one caveat to your statement here: 5 GROMs in the XB cartridge only provide 30K of addressable space (6K per GROM), not 40K (8K per GROM). Yes, later solutions were able to use the full 8K per GROM space (GRAMulator and GRAM Kracker), but that capability only became available long after this advertisement was made. Based on what was available from TI at the time, the largest cartridge could only have 42K (30K GROM and 12K ROM), although the ad ignores the bank-switched portion of the cartridge memory space. The box counts all of the available memory spaces with one exception: Speech Memory, which is also in a memory space of its own, like VDP and GROM memory are. Some TI ads reflected this additional space, others didn't.
  8. The most RAM you could have that would be CPU accessible without masking out the console ROMs would be 32K (expansion RAM) + 8K (Cartridge space) + 8K (DSR space) = 48K. Note that TI also made a card that did this, and that card also bank switched memory in most areas to get up to 128K. The card was never commercially produced, however. SAMS ended up being a much better solution for larger memory spaces, as there are a lot of the 1M boards in circulation now along with an ever-expanding software library that uses it.
  9. You are both correct on this. Marc originally called it the SID Blaster (and I actually included that name on the original layout I did for him). He changed the name to SID Master 99 before he had the first lot of boards fabricated, though. It has been SID Master 99 ever since (and I should have a new run of the boards in hand within a few weeks, along with some more PEB Extenders, as I am just waiting for the fab to finish them and send them my way).
  10. I run an HFDC that Tony installed H16 into as the floppy controller in my test system. It works quite well.
  11. The primary function of bidder masking was to eliminate shill bidder complaints. . .
  12. Isn't that a problem we all have at one time or another?
  13. Here's one I've bought from before, but they are 200nS chips. 130 of them for $260 plus about $20 shipping--but he also accepts reasonable offers. Most TI hardware has no trouble at 250nS, some will work at even slower rates. IIRC, most original TI DSR ROMS were 350nS parts. . .
  14. You may run into some serious issues with TI BASIC then, as it is one of the very few machines that coded their BASIC to the ANSI Standard dialect, as opposed to the Microsoft BASIC dialects used by almost every other machine out there. There are a lot of similarities, but there are places where the ANSI approach is a bit different. Without using the solution @mizapf suggested, you are pretty much doomed to a 28 column display on the TI when using only the standard BASIC command set. There are no easy tricks to open up the other four columns. There are lots of ways to do this using some of the extensions to TI BASIC. XB256, XB GEM, and T40 have all been mentioned as possible ways around the limitation.
  15. There are oodles of these on eBay. I have bought about a thousand of them from various sellers over the years--and most of them were good once cleaned and erased.
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