gregallenwarner

The TI used IBM compatible drives, so I'd say yank those drives out of the PC and stick 'em in the PEB! Just pay attention to the Drive Select lines, and make sure you have your ribbon cable twisted appropriately so that on the TI side it's DSK0, and on the drive side it's drive B. (All PC disk drives are hard-wired to be disk B. Unless it's a REALLY early 5 1/4 drive, in which there's a jumper to configure it as drive A or B.) Double-sided should work with the original TI brand controller card, but to get double density or 80-track working, those would need an upgraded or modded controller card.

Sounds great! Thanks! I'll check Thierry's site to see if I'm lacking anything in the ol' parts bin. I think I have a 74LS612 stashed away somewhere from a long-ago abandoned attempt to build a SAMS clone. If I might ask, where are you sourcing your 612 memory mappers from? As I recall, I had a difficult time finding mine. Also, I have another question. Thierry's site shows that the HAMS can be used with up to 16 meg of SRAM chips. Considering the cost of purchasing that many chips, does your board have any provision for smaller configurations? For example, can I install 4 meg worth of chips, and configure the board appropriately to use that particular memory size?

I'm definitely interested. Is there a parts list somewhere so I can order all the necessary chips?

Thanks, mizapf. I enjoy learning some of the peculiarities of how this old hardware worked!

I just have a random question concerning one of the lines in the cartridge port. According to the pinout, there is a "Grom Ready" or "GR" line in the cartridge port, which is meant to put the CPU on hold while the slow GROM devices are fetching their data. My question is, can a device plugged into the cartridge port use this "GR" line to put the CPU on hold whenever it likes? Or does this only get decoded into a hold signal when the TI is addressing the GROM port addresses? I've tried looking at a schematic of the console, but it's not immediately clear to me whether this line will stall the CPU at any given moment. Thanks.

The voltage regulator chips I'm using in my design are surface mount SOT-223, so they are designed to use a copper plane on the PCB as the heat spreader. I've worked this into the design, and there is a wide ground plane, as well as thermal vias, to facilitate heat spreading for these chips. Additionally, the speech synth only draws 55 mA of current, so even with worst case of 12 volts being dropped down to 5, the most power these chips would ever be dissipating would be 385 mW. They'll get warm, but certainly not too hot for the copper to dissipate. Most peripheral cards I've seen use TO-220 package regulators, and most have them mounted with their tabs flat against the PCB for similar heat spreading. If that's the case, you should be fine. As a side note, I'm still working on putting together a 2nd prototype, for anyone who's wondering on the progress. It's difficult finding several hours of uninterrupted time when there's so much of life getting in the way!

I want Starcraft.

I'm sure there's some law akin to Murphy's law somewhere that states when everything seems fine, s*** hits the fan.

I'm definitely a fanatic, since it was solely due to the TI-99/4A I was given as a child for getting me into computers as a career today. The nostalgia is strong. I've got 2 aluminum consoles, plus a beige that I think has a blown power supply. I keep the 2nd aluminum as an emergency backup. 2 PEB's. One for daily use and a 2nd that I'm restoring.

Unfortunately, not yet. This weekend turned out to be a bust when I had to spend my entire time doing some computer repair for a local restaurant that I support. It's frustrating trying to work on my own stuff when things all around me keep breaking!

No, not yet, unfortunately. I need to build a 2nd prototype, and I'm probably going to do that this weekend. I'll run the test then.

I couldn't find the difference between the Mainbyte version and Thierry Nouspikel's version. They looked like the same circuit to me. Unless I'm missing something obvious. I don't have the interrupt line hooked up. Mainly because it's not indicated in those schematics mentioned above, but also because I didn't think the SS could operate through interrupts, since it's not a DSR device. Is there something else I should know about these "interrupt" states you mentioned?

Interesting. If Parsec checks the FIFO state, then that means that Parsec requires reading from the SS, correct? Since it is only reads from the SS that are not working, then it stands to reason that my initial assumption about Parsec working is incorrect, and that in fact Parsec wouldn't work. I'll have to test this, but if Parsec doesn't work, then that further confirms my current theory. Man, debugging-by-inductive-reasoning sure gives me a headache! mizapf, how will that memory dump program help with the SS? Is there a way to get it to read the SS's ROM? Or am I going to have to plug in the SS's mapped address and manually perform reads/writes that way? Also, since the memory location is 5 digits, I assume it's expecting it in decimal rather than hexidecimal?

I'll give it a try, but according to the SS adapter schematic on Mainbyte, the Ready line is simply connected directly through to the SS. I did the same on my design. The SS has direct control over the Ready line. Is there any reason I'm not aware of that would cause problems in this configuration?

I'm definitely learning a lot about how the TI works, that's for sure!

While I haven't checked either of those specifically, my intuition tells me that that is correct. Those will be among my further tests, once I assemble a 2nd prototype for myself, but I am also going to write an assembly program to try and read the speech ROMS as well, and run it both with the adapter card and also with the SS directly plugged into the side, and compare the results.

I've done some initial testing with the prototype I built, and I was able to successfully get the speech synth to work under TE2, however, the synth was inoperable in XB using CALL SAY. This leads me to believe that the TI is having difficulty reading from the SS. It can write to it just fine, but when it attempts to read the contents of the SS's vocab ROM, that's where it's failing. I've got a couple of different debugging avenues to check, and I mailed the prototype to Ksarul, who is going to take a look at it this weekend, so we're attacking this problem on two fronts. I also have a couple of different PCB designs already mocked up for when the problem is identified, if in fact the problem is what I think it is. I thank you all for your patience while I figure out all the details. This is my first project that I'm actually going to sell, so my OCD is running in overdrive right now, making sure that the adapter card is perfect.

Excellent! This is just what I needed! Thanks!

I have a question for all you Geneve users out there. Aside from AMA through AMC, and sometimes AMD and AME for Genmod, are there any additional lines in the PEB bus that the Geneve actively uses that the TI does not? If so, what additional lines does it use, and for what purpose? I don't have a Geneve, so this is purely just curiosity on my part to learn about how it works and how it utilizes the PEB bus to talk to all the different peripherals. If you can point to some good reference materials that would thoroughly explain the Geneve's bus usage, that'd be great for me to check out. Thanks.

I think it's a keyboard interface.

Time for another update: Sorry it's taking so long. I just finished spending a lot of time optimizing and improving the PCB layout. Some of the new additions I made: * Simplified the power supply circuitry to reduce part count and improve reliability. * Added test points for voltage regulators. * Added input fuses on the PEB power rails to provide fault tolerance. * Ditched the tantalum caps for more reliable aluminum electrolytic ones. * Added dedicated header for optional LED--no soldering required. LED will be provided upon request. * Optimized a few traces for better routing, fewer vias, and better ground plane coverage. * Board now decodes AMA thru AME, with AMD and AME being optionally selected by a solder bridge. (Close solder bridge if you are running GenMod.) I think I might actually be finally done with the design! I find that I'm very nit-picky about my PCB designs. I want everything to be perfect. But I believe this is in a state where I can call it finished! This is most likely the version that will go out to the people who indicated their interest. Rendered preview attached.

My guess is the rediculously slow bus speeds. Termination is only required to prevent signal reflections from corrupting data on the line. With the TI's already slow clock speed of 3 MHz, with the added wait states, there's an eternity of time for any reflections to subside before anything starts sampling data.

I believe you can get away with it by hooking your ATX 12 volt rail directly to the PEB 8 volt rail, if all your cards have proper heatsinking. Of course, 12 volts on the 15 volt rail isn't good if your cards that require a 7812 regulator can't handle the voltage drop incurred by insufficient headroom. Removing the regulators on all your cards is the safest way, though time consuming. Plus, those cards will no longer work in an unmodified PEB!

The "mainboard" in the PEB is really just a backplane--that is, just a bunch of parallel traces to connect all the busses together. Even standard ATX power supplies can be used to power the PEB. The only real critical part of the PEB is the flex cable and interface card. With a suitable power supply, the flex cable interface card, and connectivity between cards, there's no reason why you couldn't build your own PEB. It would just be a lot of work, and you wouldn't have the nice cutouts and slots to hold all your cards neatly in place. I believe I remember seeing somewhere some photos where a user built a PEB into an ATX PC case. They probably took the backplane out of the PEB and mounted it somehow in the PC case. So I know it's possible.

Just wanted to give you all a brief update: I'm still working on assembling the prototypes. I should be able to finish these up an test them all this weekend. Meanwhile, I've been doing some re-engineering of the design before I do the full run. Mostly just revamping the power regulation circuitry to make things a little more reliable and fault-tolerant. Speficially, I'm opting to get rid of the tantalum capacitors in favor of more reliable solid polymer aluminum ones. I'm also going to throw a couple of surface mount fuses on the power traces, just to make sure that any (unlikely) failure on this board won't short out your PEB's power supply or damage other components. The fuses are a couple of cents each, and certainly seem worth it when you consider the value of your TI system! I've got to hook up my multimeter to my test rig tonight and see how much current it draws during speech activity, so I can select the proper fuses. Don't know if I'm over-engineering here, but I tend to prefer to overdo things rather than underdo them. At the very least, my conscience will rest easy that I've built the best boards that I possibly can for you all!