slingshot

It's by @foft, maybe he also has an idea (I worked on many FPGA cores, but the Atari800 is still a black box for me). The address decoder in question is here: http://www.64kib.com/redmine/projects/eclairexl/repository/revisions/960/entry/common/a8core/address_decoder.vhdl#L579 What portb bits are you depend on?

What banking method is supported by these demos? As in the FPGA core by @foft, the main demo crashes with enabled 1MB RAM, and the Epilogue is crashing with 576kB setting (both Compy and RamBo), but works with 1088kB (RamBo).

...or just add an option to the OSD to enable/disable paddle inputs for the POKEY (disabled - use $FF). Autodetecting if the USB attached joystick is analogue or digital is not really possible, as even digital devices are sending full range values.

Did you try to use the MiST RBF on SiDi? You must use this: https://github.com/ManuFerHi/SiDi-FPGA/tree/master/Cores/Computer/Atari800

Good to hear it started to work. I had a problem when the PLL reconfig kicked in during the initial ROM download, thus I've added a patch to hold it during that. But it's already in the github version, so if you also integrated it, then it should be working.

Many thanks! This effort started 2 years ago, I hope it'll be finished soon.

I've did some tests, and I suspect it's because of the image is considered read-only (at least while I've worked on the change below, it was an issue). Meanwhile I've finished the full "Mistification" of the core, and uploaded the results here: https://github.com/gyurco/Atari800XL/commits/mist Can you integrate it to your source tree please? Global changes are almost zero (two #ifdefs in main.h only).

The last one which works is 20190719.

@foft: I've noticed that the latest builds (on MiST), has problems with disk writes: they always results in Error-138 (timeout), then the firmware goes crazy, F11, F12 no more work. I think the problem started somewhere around the firmware fork (firmware_legacy and firmware_exclairexl), as it works with some older versions from 2019.

I don't know what did you check, but lot of code which end up on MiSTer still taken from MiST. It's just not promoted on that level.

Yes, only board schematics and a PDF of the PCB is published, but this didn't prevent two identical clones, and one with a Cyclone IV FPGA already. Too bad not with a bigger model. And to be fair, your contribution raised the accuracy of the 68000 based cores to a new level (which are not just ST and Genesis, but several arcade cores are using FX68K, too).

I found this topic, and I felt I must write something here... I've spent a lot of time (and it's really a lot) with MiST. I've also developed a lot of code on it. And I still like it. MiST is already 6 (or 7?) years old. Yet still capable of many thing. MiSTer of course is more powerful. Not just the FPGA has much more space, but the ARM side is stronger. However it has an unfair advantage: For every DE10-nano purchase, Intel pays the bill. The FPGA chip itself is more expensive than the whole MiST! The HDMI license for producing this board in small quantity would be also huge. Of course, as a user, probably nobody cares. But this basically stopped custom board development, since nobody can compete with this price. The realistic price would be probably around 5-600$. Also this board is not intended to sell to end-users. If some kind of fair-trade commission would exist, they surely could sue the sellers for selling under cost price, but I'm not a legal man to discuss this. But even MiST is old, and less powerful, it still has some advantage (at least what I feel as an advantage): - Fully open source design, the whole board can be built at home (well, if you have very good soldering skills). - Single board, USB HUB included. - No cooling is needed, the FPGA nor the ARM are warmer than the room. - Some cores are still better (I feel many MiSTer cores goes to a more features direction instead of accuracy - also the huge number of available resources are encouraging developers to write lousy code). - Better SDRAM placement, the GPIO pins on the DE10-nano are not really designed for driving a fast SDRAM. And for some advantages to a developer: - No Linux, it's much more fun to hack on the firmware. - Faster compile time of the cores. - Simpler framework. - No code gets rewritten just because the coding style of the original. I don't want to start a war, it's just my personal opinion, and why I'm still on MiST (however a fair amount of my code are also ported to MiSTer). Maybe I like retro hardware on retro hardware About the A2600: the original core from Retromaster is closely designed around the authentic TIA hardware. The lfsr counters, event handling, and so on. I've added some missing features, and now the core is almost 100% perfect on MiST. I cannot find a single glitch in games. Maybe the RIOT timer is not perfect in some circumstances. Then this code is ported to MiSTer. I wonder why the people are complaining there, don't know what went wrong. However about Rysha's A7800 core: I saw the code. The TIA there is from some university project, which is surely crap. It's not the Retromaster's TIA. I'm sure that has to be replaced. Also I don't know why that code is used. Maybe because it's Verilog, Retromaster's TIA is VHDL.