IuriNery Posted February 17, 2018 Share Posted February 17, 2018 Hello everyone, I'm trying to create a playfield with different colors, but something weird is happening. Some of the lines of PF/BK are not aligned properly. Here is the Screenshot: Here is the assembly code: atari3.asm If I set COLUPF or COLUBK on the main loop, it seems that it messes with some of the lines, but if I set a single color for both COLUPF and COLUBK before the StartOfFrame, everything seems to work fine. I don't know what I'm doing wrong here, if someone could help me I would be really glad. Thank for your time. Quote Link to comment Share on other sites More sharing options...
easmith Posted February 18, 2018 Share Posted February 18, 2018 (edited) I think you are waiting too many cycles to write to the registers after WSYNC. You only have 22ish cycles of Hblank . try moving the writes to COLUxx right after WSYNC and before writes to PFx . Still not perfect but it is better. I think you might also be writing to PF after HBLANK and need to preload graphics for next line. Edited February 18, 2018 by easmith Quote Link to comment Share on other sites More sharing options...
+SpiceWare Posted February 18, 2018 Share Posted February 18, 2018 Work your way through the Collect tutorial. This particular issue is known as shearing, and is covered in Step 4 - 2 Line Kernel. It even occurred in released games back in the day, like on the right side of Air-Sea Battle: Quote Link to comment Share on other sites More sharing options...
IuriNery Posted February 18, 2018 Author Share Posted February 18, 2018 (edited) I think you are waiting too many cycles to write to the registers after WSYNC. You only have 22ish cycles of Hblank . try moving the writes to COLUxx right after WSYNC and before writes to PFx . Still not perfect but it is better. I moved COLUPF & COLUBK as you said, it's better indeed. There are only 2 small issues now: atari4.asm I think you might also be writing to PF after HBLANK and need to preload graphics for next line. Can you please elaborate on that? Work your way through the Collect tutorial. This particular issue is known as shearing, and is covered in Step 4 - 2 Line Kernel. I will take a look, thanks! It even occurred in released games back in the day, like on the right side of Air-Sea Battle: Interesting, so this is a common thing that happens with Atari games that has lots of colors, gradients etc.? EDIT: is there a way to set the COLUPF and COLUBK for all the lines once? (outside the game main loop) Edited February 18, 2018 by IuriNery Quote Link to comment Share on other sites More sharing options...
easmith Posted February 18, 2018 Share Posted February 18, 2018 Putting a WSYNC before you blackout the playfield should fix the bottom line. The other anomaly I think is caused by writing to PF1 1 or 2 cycles late. Not sure how to fix it , I am pretty new. I think the 2 LK in Collect Tutorial might be the only way to fix it . I'm not sure I understand it 100% Quote Link to comment Share on other sites More sharing options...
ZackAttack Posted February 18, 2018 Share Posted February 18, 2018 If you use a repeating playfield you can set PF0 and PF1 at the end of the previous line during the time PF2 is drawn. That way you can save hblank for other updates such as cokupf and colubk. Quote Link to comment Share on other sites More sharing options...
tokumaru Posted February 19, 2018 Share Posted February 19, 2018 When designing kernels you have to mind WHEN the various registers are being updated. The TIA is continuously drawing images, so if you change something while the TIA is in the middle of a scanline, that change will appear at that point. A carefully designed kernel will try to keep track of where things are and which part of the screen the TIA is drawing to avoid updating them exactly when they're being rendered. Quote Link to comment Share on other sites More sharing options...
gauauu Posted February 21, 2018 Share Posted February 21, 2018 This is where the Stella debugger can be really helpful. It will show you exactly where the TIA is on the scanline at any given point as you step though your kernel, making it easy to see where your timing is off. Quote Link to comment Share on other sites More sharing options...
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