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carlsson

$00 = NOP, BRK or other?

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The Wikipedia page about the 1292 Advanced Programmable Video System claims it was particularly difficult to program:

The user had to be familiar with programming in Signetics 2650 assembly language and the unconventional ways and register architecture of the Signetics 2650 processor. For example, on many other processors an opcode 0 indicates "no operation" whereas on the 2650 it instructs the processor to Branch To Address In Immediate Register B. This was a source of many software debugging hassles for budding home programmers.


It made me curious. Did nearly every other processor and microcontroller back in the 1970's default to opcode $00 equals NOP? So far I have found the following:

 

Zilog Z80 and Intel 8080: $00 = NOP (No Operation)

Intel 8048 : $00 = NOP (No Operation)

RCA 1802: $00 = IDL (Idle)

 

So far, so good. But how about the others?

 

MOS 6502: $00 = BRK (Break, causes an interrupt)

GI CP-1610: $0000 = HLT (Halt, not sure what it does but likely not NOP)

Motorola 6809: $00 = NEG $nn (not entirely sure about this syntax, but at least NEG)

Signetics 2650: $00 = Branch to address in immediate register B (per the Wikipedia article)

 

I failed to look up what the TMS-9900 and the Fairchild F8 do with opcode $00 or $0000. It seems that Motorola 6801/03 doesn't define $00 at all.

 

Likely I have missed some relevant processors and microcontrollers of the time, but it seems like the article describes how a programmer used to Intel or Zilog would be confused about the Signetics. Programmers used to MOS, GI or Motorola may have been confused too, but at least not expecting NOP.

 

Now machine code programming has far more interesting challenges than which instruction equals which value when encoded as binary/hex/decimal data, I would think that works out rather quickly, in particular if you were able to have a cross assembler on some mini computer or similar when developing software for the 1292 APVS series.

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Likely I have missed some relevant processors and microcontrollers of the time, but it seems like the article describes how a programmer used to Intel or Zilog would be confused about the Signetics. Programmers used to MOS, GI or Motorola may have been confused too, but at least not expecting NOP.

Yep, the writer's background in Z80 shines thru.

 

In 80x86 the NOP opcode is $90 and in 6502 it's $ea.

 

So it's a non-sense. You cannot simply expect $00 to be NOP because you used Z80 once.

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Am I right that on the 9900, an opcode may be 3-11 bits and the rest are operands? It doesn't seem that any instruction has eight leading bits of 0 in any case.

 

On the F8, it appears $00 equals LR A,KU which loads the accumulator with register 12, the upper part of K so that is yet one more strike against the NOP theory.

 

Besides that Wikipedia article has for years mentioned Activision games, but I can't find any proof elsewhere they ever made any since they didn't even release for the Arcadia 2001. I think the contributor might think about Acetronic or mixing it up with a different system, like Advision (Arcadia 2001 clone).

Edited by carlsson

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Am I right that on the 9900, an opcode may be 3-11 bits and the rest are operands? It doesn't seem that any instruction has eight leading bits of 0 in any case.

All instructions are 16-bits and there isn't a NOP instruction defined officially, but you can always do MOV R0,R0

 

On the F8, it appears $00 equals LR A,KU which loads the accumulator with register 12, the upper part of K so that is yet one more strike against the NOP theory.

 

Besides that Wikipedia article has for years mentioned Activision games, but I can't find any proof elsewhere they ever made any since they didn't even release for the Arcadia 2001. I think the contributor might think about Acetronic or mixing it up with a different system, like Advision (Arcadia 2001 clone).

Probably you're right, I don't know enough of obscure consoles :)

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Actually I was looking to find out what happens when the CPU or MCU hits $00 when it expects an instruction, not how to perform NOP on various architectures but both probably are useful bits of information. The UK based poster who contributed lots of information later removed from the Wikipedia article never signed with name or handle, just their IP address showing so rather anonymous for being someone with so much insight. Then again Wikipedia generally doesn't like own research, no matter the degree of accuracy unless you elsewhere can prove you are a reliable source.

 

If all types of architectures would be equally common, it seems to be a 40% chance that $00 will cause a NOP and 60% that it will do something completely different.

Edited by carlsson

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And in 80x86 the 00 00 opcode would translate to ADD AL,[bX+SI]

 

Years since I saw that trying to disassemble games using DEBUG :)

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And on the 68000, an MSB of $00 seems to be an ORI instruction. The 6800 though doesn't have $00 defined just I assumed on the 6801/6803.

 

The Intel 8008 seems to be HLT on $00, $01 or $FF, which is quite different from the Intel 8080 doing NOP. I wonder how many Intel programmers got confused when the opcodes changed?

 

If we put those CPUs and MCUs ordered by year, it gets even more interesting:

 

1972: Intel 8008 - HLT

1973: Signetics 2650 - Branch ...

1974: Intel 8080 - NOP

1974: Motorola 6800 - N/A

1975: Fairchild F8 - LR A,KU

1975: MOS 6502 - BRK

1976: RCA 1802 - IDL

1976: Zilog Z80 - NOP

1976: Intel 8048 - NOP

1976 (?): GI CP-1610 - HLT

1978: Motorola 6809 - NEG

 

So by the time of the Signetics 2650, possibly nobody else had NOP'ed at $00 and even by 1975, it was more common to HLT/BRK than NOP.

 

Yes, I know this is an entirely pointless discussion and probably I should just log onto Wikipedia suggesting a change in the wording.

Edited by carlsson
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Maybe I am missing something here but why would it matter what the opcode was. The assembler would generate the correct code.

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I think the idea is that you hand code your program byte by byte and somehow have enough knowledge of the platform to address it correctly, but mistake the opcodes between different platforms. A very unusual scenario.

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>Signetics 2650: $00 = Branch to address in immediate register B (per the Wikipedia article)

 

As usual, Wikipedia is completely wrong. The 2650 has no "immediate register B". $00 is LODZ r0, which does not branch.

Edited by Minuous
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Yes, the article on the 1292 APVS already has been contested to be full of misinformation so nothing new under the sun, except that the instruction to load register zero still is not a NOP instruction like it would be on e.g. the Intel 8080. But as we concluded a few years ago, even if you didn't have any tools like a macro assembler, you would need to know the opcodes for every possible instruction and register set anyway so if you would be mixing up 1 instruction from another CPU/MCU, chances would be you mix up all the others as well and get nothing but gibberish.

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Yes, NOP is $C0 on the 2650.

 

The Z80 uses the same $00 opcode as Intel because it was designed to be a superset of the Intel instruction set.

 

There is a "Common Assembly Language for Microprocessors" (aka CALM) which enables different CPUs to assemble the same source code.

 

But raw opcode values are only compatible in rare cases like the Z80.

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