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800 Static Ram


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Hello,

Today I had some free time and began making a Static 512k Ram Card for my Atari 800. (shits and giggles! every real expansion has already been made by smart people!) LOL! SO!!!

 

 

Data Bus D0-D7

Address Bus A0 to A12 (8K for testing)

 

So my question is.....

R/W should go to Early r/w or late r/w?? or condition it with??

/CE  to S0 (for 8k, for testing) eventualy S0-S5 AND'ed for 48k

/OE where should it go?? Condition it with??

 

Later Ill add a data latch for memory banking..

Thanks In Advance!!

20200427_144627.thumb.jpg.82db335022162e42c9d07487e42021de.jpg

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Nice, if you could do it as a daughter card for an existing module that might save some cost.

 

I don't know re those outputs but would guess to use late /RW.  /OE I believe is output enable for reading.

Logic - I would guess since normal Ram uses Cas/Ras and the IO action takes place in that second half, you'd probably want the same occurring with SRam (looking at schematic for a Ram module it seems to tie the late /W to the memory chips.

 

To achieve that, you could probably employ the Cas sigal in the logic path.

Also note you have the /Refresh signal - since it's SRam those accesses could be ignored, not sure what else happens, might be a Cas only cycle?

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For what it’s worth, you might want to look at the 1088XEL design, which uses a 64K static RAM chip as the base memory for the system. The schematics might give you some good pointers. All details and schematics are available here:

 

https://ataribits.weebly.com/1088xel.html

 

 

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21 hours ago, Rybags said:

Nice, if you could do it as a daughter card for an existing module that might save some cost.

 

I don't know re those outputs but would guess to use late /RW.  /OE I believe is output enable for reading.

Logic - I would guess since normal Ram uses Cas/Ras and the IO action takes place in that second half, you'd probably want the same occurring with SRam (looking at schematic for a Ram module it seems to tie the late /W to the memory chips.

 

To achieve that, you could probably employ the Cas sigal in the logic path.

Also note you have the /Refresh signal - since it's SRam those accesses could be ignored, not sure what else happens, might be a Cas only cycle?

Rybags, Thank you for your help!! looks like the Late R/W did the trick!! 

17 hours ago, DrVenkman said:

For what it’s worth, you might want to look at the 1088XEL design, which uses a 64K static RAM chip as the base memory for the system. The schematics might give you some good pointers. All details and schematics are available here:

 

https://ataribits.weebly.com/1088xel.html

 

 

Dr. Venkman, Mr Micheal 1088XEL work is amazing! thanks for the link. His Schematics are a big help!! I will connect /OE to inverted Late R/W. right know I have it tied low in hopes the /CE timing is "good enough"  LOL!

13 hours ago, David_P said:

Another user did a similar project a few years ago.

 

David_P, Thank you for the advise! its a similar idea, but im trying to use one 512k static ram for all memory, he is using 2 16k cards and a bankable 512k with 16k window card (slot2)  

so here is what I did today...

 

/OE to GND

20200428_162523.thumb.jpg.5d101270e5e8d502956bd787a8350dd2.jpg

 

S0 to /CE    8k is recognized!!!

20200428_162529.thumb.jpg.6ce22becc5164bb86bbf9b72e955678e.jpg

 

S0 AND'ed with S1 to /CE   (with 74LS11 AND gate) 16K!!

20200428_163008.thumb.jpg.08b1c814f8a07d7536b00e692aafba6f.jpg

 

SO AND S1 AND S2 24K

20200428_163646.thumb.jpg.b84fb4fe30241b1f5935fbc89058ab37.jpg

 

S0 AND S1 AND S2 to the next AND gate AND S3 and S4 40k...(I skipped 32K)

20200428_165105.thumb.jpg.cde576c59b5f6530de8994582585cac8.jpg

 

Tomorrow I will Invert Late R/W to /OE and figure out the logic for bank switching...is it better to have 8k Banks or 16 k banks?? what is more useful?

20200428_162737.jpg

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Nice work!

 

You can avoid wiring to the motherboard by plugging into the second RAM slot. There you get all your signals except one, and that one you get from the OS ROM board in slot 0.

 

Slot 2 has A0 - A13 and /S2 - /S5. Slot 0 has A15. So your /CE would be A15 AND /S4 AND /S5. Your A14 would be /S2 AND /S3. That gets you 48K. So you don't need /S0 or /S1, and the /S4 and /S5 you get from slot 2 are already disabled by inserted cartridges.

 

Of course banking is more complicated (I recommend the Axlon scheme) but the point is you don't need anything beyond what's available in slots 0 and 2.

 

Here's how to modify that Axlon-compatible SRAM board linked above so as not to need any 16K boards: 

 

Edited by ClausB
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17 hours ago, Ralphy Rocket said:

is it better to have 8k Banks or 16 k banks?? what is more useful?

Well, all versions of SpartaDOS X support the "AXLON" banking scheme (16K banks at $4000) so that makes it immediately useful for keeping OS buffers and such out of main memory, and the rest for a RAMDisk.

 

The Mosaic method (4K banks @ $C000) is not supported by SpartaDOS X, but there are software/utilities of course around that can still use it...

 

Hmm, with a quick peruse of the Altirra Hardware Reference manual, I didn't see a description of the 400/800 Axlon/Mosaic extended memory schemes.

 

 

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20 hours ago, ClausB said:

Nice work!

 

You can avoid wiring to the motherboard by plugging into the second RAM slot. There you get all your signals except one, and that one you get from the OS ROM board in slot 0.

 

Slot 2 has A0 - A13 and /S2 - /S5. Slot 0 has A15. So your /CE would be A15 AND /S4 AND /S5. Your A14 would be /S2 AND /S3. That gets you 48K. So you don't need /S0 or /S1, and the /S4 and /S5 you get from slot 2 are already disabled by inserted cartridges.

 

Of course banking is more complicated (I recommend the Axlon scheme) but the point is you don't need anything beyond what's available in slots 0 and 2.

 

Here's how to modify that Axlon-compatible SRAM board linked above so as not to need any 16K boards: 

 

Thank you dear sir!!  I really appreciate you ringing in!! in my minds eye I think I have to start in slot one...but your equates make perfect sense!! I have all the /S0 to /S5 wires comming of the LS42... I hadn't realized the ram inhibit from the cartridges!!! I realize now those signals come from the ls32 ... Ill make those changes tomorrow. I realize all this has been done before proper ..Its just my hobby, and I really enjoy the journey!! 

 

thanks again Claus!!!

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