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acadiel

Tutor Technical Information thread

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Let’s make a thread for technical info as we get it, including:

 

Joystick Pinout

Expansion Connector Pinout

Cartridge Pinout

Memory map

PDFs of any technical documentation (BASIC commands for assembly, etc.)

 

It would be great to get a list going in a documentation thread with all known games and scans of the PDF manuals, including the user manuals. Lots of these systems come with no manuals, and these don’t seem to be readily available anywhere. 
 

Here’s a good start we will need to translate thanks to @tanam1972:

 

http://www43.tok2.com/home/cmpslv/index.htm

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Here's an English translation of http://www43.tok2.com/home/cmpslv/Pyuuta/EnrPt.htm - attached as PDF.

 

Below are all the pictures from the PDF.

 

CPU:

 

ptcpu.png

 

System Rom:

 

ptrom.png

 

I/O:

 

ptio.png

 

Keyboard and Joystick:

 

ptkey.png

 

Keyboard Matrix:

 

ptmat.png

 

TP1101 Joystick:

 

ptpad.png

 

Sound:

ptpsg.png

 

VDP:

 

ptvdp.png

 

Connector pinouts:

 

ptcon.png

 

  

 

64K cart diagram:

ptgam.png

 

 

 

Enri's Home PAGE (TP1000).pdf

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Here's an older page of @tanam1972  https://tms9918.hatenablog.com/entry/2018/05/15/110023

 

Technical information on his game adapter:  https://tms9918.hatenablog.com/entry/2018/12/15/142407

  • A game adapter that allows you to run 32KB ROMs, etc. in the expansion slot of the first Pyuta.
  • If you write the BIOS to 27C512 on the ROM writer, it will be upgraded to mk2.
  • Pyuta It is not available in Jr/mk2. It is only for the first generation Pyuta.
  • 1: The second half of 27C512 (8000-FFFF)
  • 2: First half of 27C512 (0000-7FFF)
  • 16: BIOS valid range (0000-3FFF)
  • 32: BIOS valid range (0000-7FFF)
  • KILL: Disables the main BIOS and enables the BIOS written to 27C512

Cartridging G-BASIC Games: https://tms9918.hatenablog.com/entry/2018/02/12/234003

 

TMS9918 program:  https://tms9918.hatenablog.com/entry/2016/01/17/000815

 

Try connecting the RAM & ROM cartridge to Pyuta's expansion slot Part 6:  https://tms9918.hatenablog.com/entry/2018/01/18/211846

 

There is a lot more on his blog.  @tanam1972 - Can you please post some of your best article links?   Thanks!

 

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I adapted @jedimatt42's pinout from his picture into an actual pinout for the joysticks.  This is looking at a DB9 female that would plug into the unit, with pin #1 top left, pin #5 top right, #6 bottom left, #9 bottom right.  

 

Note, all six pins that aren't ground (L/R/U/D/BT1/BT2) need 1N614 diodes with the cathode pointing to the controller side.

------------------------------
\   1    2    3    4    5   /
 \    6    7    8     9    /
  -------------------------

 

  1. GND P1
  2. GND P2
  3. Button 1
  4. Button 2
  5. Down
  6. Left
  7. Up
  8. Right
  9. N/C


I might have some of these backward, but will post pictures of the adapter that I made. 

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From Tanam:

 

--- Internal ROM images

	IPL.ROM		$0000-$7FFF
	BASIC.ROM	$8000-$BFFF (if exists)

--- Cart ROM images

	Cart ROM is mapped to $8000-$BFFF or $4000-$BFFF

 

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Just now discovered this thread. Since there are schematics above, it seems there is all the necessary information to make FPGA version of the Tutor.

I've built a TMS9995 system on breadboard in the past, but it's been a few years ago.

It's mind-blowing how they just copied the TI-99/4A. Still no proper CPU RAM (sigh).

Notably in the schematics VDP_CS is in the same address for both reads and writes, since the TMS9995 does not perform a read operation before each write, unlike the TMS9900. The TI-99/4A places VDP read and write ports to different address in order to avoid problems with these reads to write ports. 

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18 hours ago, speccery said:

Just now discovered this thread. Since there are schematics above, it seems there is all the necessary information to make FPGA version of the Tutor.

I've built a TMS9995 system on breadboard in the past, but it's been a few years ago.

It's mind-blowing how they just copied the TI-99/4A. Still no proper CPU RAM (sigh).

Notably in the schematics VDP_CS is in the same address for both reads and writes, since the TMS9995 does not perform a read operation before each write, unlike the TMS9900. The TI-99/4A places VDP read and write ports to different address in order to avoid problems with these reads to write ports. 

If you want minimal, check out the Jr layout.  Wow!  (From Cameron’s site)

 

 

8E4C9A3F-1705-4072-A444-2E20BA320581.jpeg

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30 minutes ago, acadiel said:

If you want minimal, check out the Jr layout.  Wow!  (From Cameron’s site)

 

Thanks! Considering that there are 8 DRAM chips for the VDP, they really have simplified it! It appears they've removed the keyboard interface and probably some other things too. Could you share the URL as well?

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1 hour ago, speccery said:

Thanks! Considering that there are 8 DRAM chips for the VDP, they really have simplified it! It appears they've removed the keyboard interface and probably some other things too. Could you share the URL as well?

Yep, his Jr. Site is here:  https://www.floodgap.com/retrobits/tomy/pyuuta/pyuutajr.html

 

A hardware question for you - instead of eight 16k x 1 bit chips, how easy is it to replace with one 16k x 8 chip?  What would the wiring look like?

 

Or something like this - but can it be made simpler?  https://www.yumpu.com/en/document/read/46927596/sram-replacement-for-tms99x8-vram

 

 

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38 minutes ago, acadiel said:

Yep, his Jr. Site is here:  https://www.floodgap.com/retrobits/tomy/pyuuta/pyuutajr.html

 

A hardware question for you - instead of eight 16k x 1 bit chips, how easy is it to replace with one 16k x 8 chip?  What would the wiring look like?

 

Or something like this - but can it be made simpler?  https://www.yumpu.com/en/document/read/46927596/sram-replacement-for-tms99x8-vram

 

 

Thanks for the link! There are no 16k*8 DRAM chips. I suppose the closest would be to use two 64k*4 DRAM chips (4464 DRAMs). This would provide 64K of VRAM, of which 16K would be used, the highest address line would need to be a constant. I am not 100% if the DRAM refresh would work in this case though.

I've seen the circuit you referred to before, for example here is something similar: https://www.tindie.com/products/mfkamprath/tms9918a-video-card-kit-for-rc2014/

It could be simplified by integrating all the logic into one CPLD, for example XC9572XL could do the job, then you'd have the 9918, CPLD and SRAM.

The whole VDP+VRAM can be contained also in one FPGA, like I have done for example in my ICY99 project. But if one wants to retain the original TMS9918 (or TMS9928) then I think the lowest chip count is with the CPLD+SRAM solution.

 

Thinking about it, if one wanted to use the original TMS9918 and TMS9995 - and it would be acceptable to use a CPLD, I think the Jr could be reduced five chips: TMS9995, TMS9918, SRAM for VRAM, ROM and a CPLD for everything else. hmmm... this would be a fun project to do! Although I would add one more SRAM to provide RAM for the TMS9995. And I do have all of this chips already at hand. hmmmm....

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@tanam1972 cartridge information website:  https://tms9918.hatenablog.com/entry/2018/01/18/211846

 

 

Try connecting a RAM & ROM cartridge to the expansion slot of Tutor Part 6

 

I thought about how to connect 16KB RAM (CXK58257P-10L) and 24KB ROM (27C256) to the cartridge slot of Pyuta / Jr / mk2.

The Tomy Tutor / mk2 in 16KB RAM (6000-7FFF / C000-DFFF ), the Jr 8KB RAM (6000-7FFF) was used.

Please use the sample programs (16KB RAMTEST, TINY BASIC, PITFALL !, TI SCRAMBLE) here.

http://www.geocities.jp/parallel_computer_inc/pyuta16kram.zip 

@tanam1972(the above link is dead, unfortunately.)

 

Address  A0 A1 A2 | /CE  RAM  /CE2 A14 A13 ROM
>0000    0  0  0  |  1         1   -   -
>2000    0  0  1  |  1         1   -   -
>4000    0  1  0  |  1         0   1   0  >4000
>6000    0  1  1  |  0  >6000  1   -   -
>8000    1  0  0  |  1         0   0   0  >0000
>A000    1  0  1  |  1         0   0   1  >2000
>C000    1  1  0  |  0  >4000  1   -   -
>E000    1  1  1  |  1         1   -   -

Equations for the GAL:

;
; PYUTA16KRAM.EQN - PYUTA2 RAM&ROM CARTRIDGE
;

TITLE PYUTA2 RAM&ROM CARTRIDGE
PATTERN A
REVISION 1.0
AUTHOR TANAM1972
COMPANY PARALLEL COMPUTER INC
DATE 1/20/18

CHIP PYUTA2 GAL22V10

NC A2 A1 A0 NC NC NC NC NC NC NC GND
NC CE_n CE2_n SELEXM A14 A13 NC NC NC NC NC VCC

EQUATIONS

CE_n = A0 * /A1 + A0 * A2 + /A0 * /A1 + /A0 * /A2 + /A1 + /A1 * A2 + /A1*/A2

CE2_n =/A0 * /A1 + /A0 * A2 + A1 * A0 + A1 * A2

SELEXM = /A0 * A1 + /A1 * A0 + /A2 * A0 + /A2 * A1

A14 = A1

A13 = A2

I tried to post from the circuit diagram of US TUTOR.

http://www.floodgap.com/retrobits/tomy/ioport.gif

It is said that the SELEX M signal (MEMORY) of the expansion slot operates in US TUTOR. For mk2, the RAM & ROM cartridge operated in the cartridge slot instead of the expansion slot.

http://www43.tok2.com/home/cmpslv/Pyuuta/EnrPt.htm

 

 PYUTA(mk2)
PIN 1  GND(0V)
PIN 2 GND(0V)
PIN 3 D7
PIN 4 /INT1
PIN 5 D6
PIN 6  /HOLD(GND)
PIN 7  D5
PIN 8  A15
PIN 9  D4
PIN10  A13
PIN11  D3 
PIN12  A12
PIN13  D2 
PIN14  A11
PIN15  D1 
PIN16  A10 
PIN17 D0 
PIN18 A9 
PIN19 /IOPORT(/E000)
PIN20 A8
PIN21  /MEMEN
PIN22  A7
PIN23  A14
PIN24  A3
PIN25  A2
PIN26 A6
PIN27 /READY
PIN28 A5
PIN29 /DBIN
PIN30  A4
PIN31  /WE
PIN32  A1
PIN33  /INT4
PIN34  A0
PIN35  SELEXM(MEMORY)
PIN36  ROMCLK(/0000)
PIN37  /RESET
PIN38  /EXP0(GROM SEL)
PIN39  /EXP1(GROM CLK)
PIN40  /EXP2(VDP)
PIN41 /EXP3(SOUND)
PIN42 /EXM00(/0000)
PIN43 /EXM40(/4000)
PIN44 /EXM80(/8000)
PIN45 /EXMC0(/C000)
PIN46  CLKOUT
PIN47  LAQ(/CRUIN)
PIN48  KILLROM(-5V)
PIN49  VCC(+5V)
PIN50  VCC(+5V)

 

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On 11/12/2020 at 4:32 PM, acadiel said:

 

A hardware question for you - instead of eight 16k x 1 bit chips, how easy is it to replace with one 16k x 8 chip?  What would the wiring look like?

 

with a TMS9118 it would be only two TMS4416 RAMs (16k*4)

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Made an Atari Style joystick adapter - put six 1N914 diodes for the four directional and two buttons.  The unused pin 6 (or 9, depending on how you look at the female connector) I hooked up to SL2, for when I mod a joypad to use two fire buttons.  

9EB06B13-F85B-4D22-9665-5AB53E261CE4.jpeg

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Hi,

I never was a hardware guy, only did some very small stuff, but I know want to learn this also. 

 

So I want to know how is the address decoding done on the cartridge port of the tutor (not the expansion port). In the cartridge port the RAM / ROM card from tanam work and you got the rom and also ram at c000. 

 

How they did it because the upper adress lines (a0 and a1 , means a14 and a15) are missing on this port?

 

I ask tanam and he confirm me that it works. 

 

And what the following in the GAL chip did?

 

;
; PYUTA16KRAM.EQN - PYUTA2 RAM&ROM CARTRIDGE
;

TITLE PYUTA2 RAM&ROM CARTRIDGE
PATTERN A
REVISION 1.0
AUTHOR TANAM1972
COMPANY PARALLEL COMPUTER INC
DATE 1/20/18

CHIP PYUTA2 GAL22V10

NC A2 A1 A0 NC NC NC NC NC NC NC GND
NC CE_n CE2_n SELEXM A14 A13 NC NC NC NC NC VCC

EQUATIONS

CE_n = A0 * /A1 + A0 * A2 + /A0 * /A1 + /A0 * /A2 + /A1 + /A1 * A2 + /A1*/A2

CE2_n =/A0 * /A1 + /A0 * A2 + A1 * A0 + A1 * A2

SELEXM = /A0 * A1 + /A1 * A0 + /A2 * A0 + /A2 * A1

A14 = A1

A13 = A2

Sorry for so much stupid questions, but maybe someone can explain me.

 

 

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We probably need to do some reconciliation on the external printout.  There are three that I've found in this thread:

 

Enri's: http://www43.tok2.com/home/cmpslv/Pyuuta/EnrPt.htm
Printer: https://www.floodgap.com/retrobits/tomy/iprinter.pdf.zip
Typed tutor:

ioport.gif

 

 

And three different pinouts:

 

Pin	Tutor (printer)	Tutor (typed) 		 Pyuuta (Enri)
1	GND		GND			GND
2	GND		GND			GND
3			D0 (LSB)		D7
4	D0		INT1/			INT1/
5			D1			D6
6	D1		GND			HOLD/
7			D2			D5
8	D2		A0			A15/CRUOUT
9			D3			D4
10	D3		A2			A13
11			D4			D3
12	D4		A3			A12
13	A4		D5			D2
14	D5		A4			A11
15	A5		D6			D1
16	D6		A5			A10
17	A6		D7 (msb)		D0
18	D7		A6			A9
19			E000/ (external)	IOPORT/
20			A7			A8
21			MEMEN/			MEMEN/
22			A8			A7
23	A12		A1			A14
24			A12			A3
25	A9		A13			A2
26	A13		A9			A6
27	A10		READY/			READY
28			A10			A5
29	A11		DBIN/			DBIN/
30	DBIN		A11			A4
31	A14		WE/			WE/CPUCLK/
32	WE		A14			A1
33	A15		INT4/ (internal)	INT4/ EC/
34			A15/ (msb)		A0
35			MEMORY (internal)	SELEXM
36			0000-3FFF/		ROMCLK
37			RESET			RESET/
38			GROM SEL E4XX/ ext	EXP0/
39			GROM CLK		EXP1/
40			VDP/			EXP2/
41			SOUND/			EXP3/
42			0000-3FFF/ ext		EXM00/
43			4000-7FFF/ ext		EXM40/
44			8000-BFFF/ ext		EM80/
45			C000-FFFF/ ext		EXMC0/
46			CPUCLK OUT		CLKOUT
47			CRUIN/			LAQHOLDA
48	Vbb (-5V)	Vbb (-5V)		KILL SROM/
49	Vcc		Vcc			Vcc
50	Vcc		Vcc			Vcc

 

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Look carefully and you will see a pattern in the pin differences: in the first two, it looks like the printer is reversing even and odd pins everywhere except at the beginning and at the end. If you look at Enri's list, it looks like he is using standard pin descriptions for teh bits, instead of the inverted nomenclature TI uses. Those changes to the first and third chart eliminate a lot of the differences. . .

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On 1/25/2021 at 6:38 PM, Ksarul said:

Look carefully and you will see a pattern in the pin differences: in the first two, it looks like the printer is reversing even and odd pins everywhere except at the beginning and at the end. If you look at Enri's list, it looks like he is using standard pin descriptions for teh bits, instead of the inverted nomenclature TI uses. Those changes to the first and third chart eliminate a lot of the differences. . .

 

OK, If I flip every two in the first column, they do line up with the second one.  And, if I reverse the numbering of the address lines and data bits, the second column and third column substantially line up.  We just need to figure out the other important differences now.  (Like the KILL SROM pin on the Pyuuta that's Vbb on the Tutor.)

 

Pin	Printer	Tutor 		Pyuuta (Enri)
1	GND	GND		GND
2	GND	GND		GND
3	D0	D0 (LSB)	D0 (D7)
4		INT1/		INT1/
5	D1	D1		D1 (D6)
6	 	GND		HOLD/
7	D2	D2		D2 (D5)
8	 	A0		A0/CRUOUT (A15)
9	D3	D3		D3 (D4)
10	 	A2		A2 (A13)
11	D4	D4		D4 (D3)
12	 	A3		A3 (A12)
13	D5	D5		D5 (D2)
14	A4	A4		A4 (A11)
15	D6	D6		D6 (D1)
16	A5	A5		A5 (A10)
17	D7	D7 (msb)	D7 (D0)
18	A6	A6		A6 (A9)
19		E000/(external)	IOPORT/
20		A7		A7 (A8)
21		MEMEN/		MEMEN/
22		A8		A8 (A7)
23	 	A1		A1 (A14)
24	A12	A12		A12 (A3)
25	A13	A13		A13 (A2)
26	A9	A9		A9 (A6)
27	 	READY/		READY
28	A10	A10		A10 (A5)
29	DBIN	DBIN/		DBIN/
30	A11	A11		A11 (A4)
31	WE	WE/		WE/CPUCLK/
32	A14	A14		A14 (A1)
33	 	INT4/(internal)	INT4/ EC/
34	A15	A15/(msb)	A15 (A0)
35		MEMORY(internal)SELEXM
36		0000-3FFF/	ROMCLK
37		RESET		RESET/
38		GROM SEL E4XX/	EXP0/
39		GROM CLK	EXP1/
40		VDP/		EXP2/
41		SOUND/		EXP3/
42		0000-3FFF/ ext	EXM00/
43		4000-7FFF/ ext	EXM40/
44		8000-BFFF/ ext	EM80/
45		C000-FFFF/ ext	EXMC0/
46		CPUCLK OUT	CLKOUT
47		CRUIN/		LAQHOLDA
48	Vbb(-5V)Vbb(-5V)	KILL SROM/
49	Vcc	Vcc		Vcc
50	Vcc	Vcc		Vcc

 

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