+cubanismo Posted June 14, 2022 Share Posted June 14, 2022 For reasons, I put together a disassembler for the Jaguar RISC processor (GPU and DSP) code last week. Here's the code: https://github.com/cubanismo/jrisc_tools The disassembler itself, jdis, is more of a test program for the rest of the code than a useful tool in its own right. I know there are a few of these already (u235, Orion's, the one in Virtual Jaguar, perhaps others), but this one is written in C, modular in the way I need it to be for some other projects, and open source. I couldn't find all those features in the existing ones, and it only took a few hours to put it together, so here it is. So far it's been useful in finding a bug in rmac ? 6 Quote Link to comment Share on other sites More sharing options...
42bs Posted June 14, 2022 Share Posted June 14, 2022 Nice! I suggest to add an option to set the start address. Quote Link to comment Share on other sites More sharing options...
laoo Posted June 14, 2022 Share Posted June 14, 2022 (edited) 5 hours ago, cubanismo said: So far it's been useful in finding a bug in rmac ? LOL. I've actually stumbled upon this issue in my top secret project while I was testing it against RMAC output ? Edited June 14, 2022 by laoo 2 Quote Link to comment Share on other sites More sharing options...
+cubanismo Posted June 14, 2022 Author Share Posted June 14, 2022 11 hours ago, laoo said: LOL. I've actually stumbled upon this issue in my top secret project while I was testing it against RMAC output ? The fact that only people testing toolchains have ever noticed this bug is telling. Not a lot of love out there for the PACK/UNPACK instructions. Also, curious to know what your top secret project is now 1 Quote Link to comment Share on other sites More sharing options...
laoo Posted June 14, 2022 Share Posted June 14, 2022 (edited) "Now" it's unfinished and it's actually the only reason to being top secret And speaking of "what" it's going to be some sort of multisystem assembler with very unique features which I desire most and could not find anywhere. Edited June 14, 2022 by laoo Quote Link to comment Share on other sites More sharing options...
42bs Posted June 14, 2022 Share Posted June 14, 2022 47 minutes ago, cubanismo said: PACK/UNPACK When I learn new architectures I check each instruction if there is a way to use it differently from the way the designer wanted it to be used. For pack/unpack I am still searching. Quote Link to comment Share on other sites More sharing options...
42bs Posted June 14, 2022 Share Posted June 14, 2022 29 minutes ago, laoo said: unique features Kind of? Quote Link to comment Share on other sites More sharing options...
laoo Posted June 14, 2022 Share Posted June 14, 2022 7 minutes ago, 42bs said: Kind of? It's hard to characterize it in few words, but best I can tell about the main feature is "static memory management for memory constrained system with ability to handle memory reconfiguration". Shortly: an assembler without orgs that can automatically put different things in the same place given they aren't acessed in the same time-frame. Quote Link to comment Share on other sites More sharing options...
42bs Posted June 14, 2022 Share Posted June 14, 2022 Ah, in a way I did with the new register pool I added to lyxass. Hmm, sounds interesting. Esp. for the 6502. A ZP pool. Mind if I borrow the idea? Quote Link to comment Share on other sites More sharing options...
laoo Posted June 14, 2022 Share Posted June 14, 2022 (edited) It's not patented or anything The idea at it's conception was about the very thing - automatic allocation of space for temporary variables on 6502's zero page. The implementation has few hard parts though, like how to be sure that some temporaries aren't accessed at the same time. Edited June 14, 2022 by laoo Quote Link to comment Share on other sites More sharing options...
+Stephen Posted June 14, 2022 Share Posted June 14, 2022 1 hour ago, 42bs said: Ah, in a way I did with the new register pool I added to lyxass. Hmm, sounds interesting. Esp. for the 6502. A ZP pool. Mind if I borrow the idea? I must say that lyxass is the best name for any software I have ran across. I had to explain to the wife why I was laughing just now. 1 Quote Link to comment Share on other sites More sharing options...
+cubanismo Posted June 15, 2022 Author Share Posted June 15, 2022 4 hours ago, laoo said: Shortly: an assembler without orgs that can automatically put different things in the same place given they aren't acessed in the same time-frame. Ah, that does sound cool! 2 hours ago, Stephen said: I must say that lyxass is the best name for any software I have ran across. I had to explain to the wife why I was laughing just now. Agreed ? Quote Link to comment Share on other sites More sharing options...
42bs Posted June 15, 2022 Share Posted June 15, 2022 6 hours ago, Stephen said: why I was laughing just now ? I never pronounce the Y in Lynx as an 'ee', more like the German 'ue'. So it took me a while to understand the 'problem'. 1 Quote Link to comment Share on other sites More sharing options...
ggn Posted June 16, 2022 Share Posted June 16, 2022 Thanks all for the PACK/UNPACK bug report, as soon as @Shamus wakes up from his slumber we will push the fix and kick off a release :). I was getting ready to type a Wall of Text(TM) with my thoughts on the aliased segments (I had thought of this problem seriously) but then I restrained myself as soon as I realised that this thread is already derailed enough! It'll have to wait for another occasion then... 1 Quote Link to comment Share on other sites More sharing options...
+cubanismo Posted June 19, 2022 Author Share Posted June 19, 2022 I've pushed version 1.1.0 with several new features. Changelog: Updated the Makefile to build the core code as a static library Rewrote the i/o abstraction in the core code to make it more flexible Instructions now track their absolute address in the program Added the ability to specify a base address on the jdis command line Added the ability to specify a file offset on the jdis command line Added the ability to include the address of each disassembled instruction in its string representation, exposed as the "-a" option in jdis. Added the ability to include the raw machine code of each disassembled instruction in its string representation, expossed as the "-m" option in jdis. Improved testing a little. Fixed some internal bugs with no user-visible symptoms. As noted above, your start address suggestion made it in this one @42bs ? https://github.com/cubanismo/jrisc_tools 4 Quote Link to comment Share on other sites More sharing options...
42bs Posted June 20, 2022 Share Posted June 20, 2022 (edited) Any reason for the hand-made parameter parsing? Do you "hate" getopt? Forked it, maybe I add following, if you are quicker, please take it as request: - Machine code line wide enough for "movei" instead of 3 separate lines - opcodes are 16bit, so rather print machine code in chunks of 16bit not 8bit - Make $f03000 (or $f1b000) as default base address instead of 0. (- support BJL header (will add this for sure ) ) - jump (rx) instead of jump T,(rx), same for jr Edited June 20, 2022 by 42bs Quote Link to comment Share on other sites More sharing options...
+cubanismo Posted June 20, 2022 Author Share Posted June 20, 2022 10 hours ago, 42bs said: Any reason for the hand-made parameter parsing? Do you "hate" getopt? No, I love it, but it's a separate dependency when porting to Windows. I don't use Windows much myself, but most people do, so I try not to make it too hard to port. This "hand-made" parsing is really just copied (from memory, so it might be a little different) from JCP. Thanks for the other suggestions. I'll let you know if I start on them, but you'll probably win that race. I'm working on some other stuff now. Quote Link to comment Share on other sites More sharing options...
42bs Posted June 20, 2022 Share Posted June 20, 2022 Ah right. I am spoilt by cygwin. Quote Link to comment Share on other sites More sharing options...
+cubanismo Posted June 28, 2022 Author Share Posted June 28, 2022 Well, as I was working on my other project, the 3-line movei formatting really started to bother me, so I took a quick break and implemented the following: On 6/19/2022 at 9:44 PM, 42bs said: - Machine code line wide enough for "movei" instead of 3 separate lines - opcodes are 16bit, so rather print machine code in chunks of 16bit not 8bit - Make $f03000 (or $f1b000) as default base address instead of 0. On 6/19/2022 at 9:44 PM, 42bs said: - jump (rx) instead of jump T,(rx), same for jr I'll leave the BJL header stuff to you @42bs. Version 1.2.0 with the above features has been pushed to the usual location: https://github.com/cubanismo/jrisc_tools And I've gone ahead and added a windows binary (Look under "Releases") for the compiler-impaired. 1 Quote Link to comment Share on other sites More sharing options...
42bs Posted June 28, 2022 Share Posted June 28, 2022 May I suggest to replace "TAB" in the source by SPACEs. "Standard" TAB length is 8. It seems indention is 2, right? Quote Link to comment Share on other sites More sharing options...
+cubanismo Posted June 28, 2022 Author Share Posted June 28, 2022 Depends on which mode you're using now. If you don't use the machine code or source options, the instructions are indented one hard tab ("\t"). If you do specify those options, I used spaces (0x20) and manually aligned things, as I couldn't get tabs to line up well after all the reformatting. Bit of a hodge-podge. Quote Link to comment Share on other sites More sharing options...
42bs Posted June 28, 2022 Share Posted June 28, 2022 3 minutes ago, cubanismo said: Depends on which mode you're using now. If you don't use the machine code or source options, the instructions are indented one hard tab ("\t"). If you do specify those options, I used spaces (0x20) and manually aligned things, as I couldn't get tabs to line up well after all the reformatting. Bit of a hodge-podge. I meant the source code not the output. Quote Link to comment Share on other sites More sharing options...
+cubanismo Posted June 28, 2022 Author Share Posted June 28, 2022 1 minute ago, 42bs said: I meant the source code not the output. Ah, got it. I've grown to prefer hard tabs, but I can't bring myself to deal with the large 8-space standard size. When I started working on Skunkboard stuff, I started using EditorConfig to deal with @Tursi's use of a mixture of hard and soft tabs and apparent inability to pick a consistent tab size, and I started initializing all my own projects with a .editorconfig file that sets up hard tabs of width 4. So if your editor has an editorconfig plugin, it should pick up the correct formatting automatically. If not, well, sorry. I also code in vim BTW. Hopefully we can still be friends: 2 Quote Link to comment Share on other sites More sharing options...
42bs Posted June 28, 2022 Share Posted June 28, 2022 In our company, the coding guide line for C/C++ TAB character for indention are not allowed to avoid merging problems between sources written with editor which may define TAB length != 8. Quote Link to comment Share on other sites More sharing options...
42bs Posted June 28, 2022 Share Posted June 28, 2022 1 minute ago, cubanismo said: So if your editor has an editorconfig plugin, it should pick up the correct formatting automatically. If not, well, sorry. I also code in vim BTW. Hopefully we can still be friends: Getting hard ? Maybe add comment on top of the source. Quote Link to comment Share on other sites More sharing options...
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